Processor register

lastmod 2020-12-09created 2015-04-0425 edits

A processor register (Korean refined term: girokgi (기록기, "recorder")), or simply a register, is a very fast storage location that holds data inside a computer's processor. It is generally used to store the values currently being computed. Most modern processors use a load-store design, which moves data from main memory into registers, processes the data, and then stores the contents from the registers back into main memory.

Registers sit at the top of the memory hierarchy and are the fastest memory to access. In modern processors, registers are usually implemented as a register file, but in the past they were also implemented with flip-flops, magnetic cores, thin-film memory, and so on.

Segment

What is a segment?

Segment:Offset: 물리적 주소 = Segment x 0x10 + offset

80386+ Register Set

X86-registers.png

The content below omits the E, meaning 'Extended', as in EAX and EBX.

If a register name starts with R, it is because the process is in a 64-bit environment. In a 32-bit environment it starts with E.

General purpose registers

AX: arithmetic operations, I/O operations, INT 21.
BX: Base or Pointer.
CX: loops and repetition
DX: various data, character output

All general-purpose registers are 16 bits and can be split into 8-bit registers. For example, AX can be split into AL and AH. L stands for low and H stands for high. If you assign a value to AX, AH contains the first part of that value and AL contains the last part.

When the 386 came out, 4 new registers were added: EAX, EBX, ECX, and EDX. Here E stands for Extended, meaning 32 bits. And note that <span style="color:red">there is no such thing as EAH or EAL.

Index registers

SI (Source Index): used to specify the source of a string/array.
DI (Destination Index): used to specify the destination of a string/array.
IP (Instruction Pointer): stores the address of the next instruction, and so cannot be changed directly.

Stack registers

BP (Base Pointer): used together with SP for stack operations.
SP (Stack Pointer)

Segment registers

CS (Code Segment): the memory block that stores code
DS (Data Segment): the memory block that stores data
SS (Stack Segment): a register used by the processor to store return addresses from routines
ES, FS, GS: used for special purposes.

Special purpose

IP (Instruction Pointer): holds the offset of the executed instruction.

EFLAGS Register (EFL)

Assembly language - flags register values by operation

The EFLAGS is a 32-bit register used as a collection of bits representing Boolean values to store the results of operations and the state of the processor.

The names of these bits are:

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
0	0	0	0	0	0	0	0	0	0	ID	VIP	VIF	AC	VM	RF


15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	NT	IOPL		OF	DF	IF	TF	SF	ZF	0	AF	0	PF	1	CF

The bits named 0 and 1 are reserved bits and shouldn't be modified.

The different use of these flags are:
0.	CF : Carry Flag. Set if the last arithmetic operation carried (addition) or borrowed (subtraction) a bit beyond the size of the register. This is then checked when the operation is followed with an add-with-carry or subtract-with-borrow to deal with values too large for just one register to contain.
2.	PF : Parity Flag. Set if the number of set bits in the least significant byte is a multiple of 2.
4.	AF : Adjust Flag. Carry of Binary Code Decimal (BCD) numbers arithmetic operations.
6.	ZF : Zero Flag. Set if the result of an operation is Zero (0).
7.	SF : Sign Flag. Set if the result of an operation is negative.
8.	TF : Trap Flag. Set if step by step debugging.
9.	IF : Interruption Flag. Set if interrupts are enabled.
10.	DF : Direction Flag. Stream direction. If set, string operations will decrement their pointer rather than incrementing it, reading memory backwards.
11.	OF : Overflow Flag. Set if signed arithmetic operations result in a value too large for the register to contain.
12-13.	IOPL : I/O Privilege Level field (2 bits). I/O Privilege Level of the current process.
14.	NT : Nested Task flag. Controls chaining of interrupts. Set if the current process is linked to the next process.
16.	RF : Resume Flag. Response to debug exceptions.
17.	VM : Virtual-8086 Mode. Set if in 8086 compatibility mode.
18.	AC : Alignment Check. Set if alignment checking of memory references is done.
19.	VIF : Virtual Interrupt Flag. Virtual image of IF.
20.	VIP : Virtual Interrupt Pending flag. Set if an interrupt is pending.
21.	ID : Identification Flag. Support for CPUID instruction if can be set.

Segmentation

We are using the 32-bit segment addressing feature of the 486. Using 32-bit addressing as opposed to 16-bit addressing gives us many advantages:

No need to worry about 64K segments. Segments can be 4 gigabytes in length under the 32-bit architecture.
32-bit segments have a protection mechanism for segments, which you have the option of using.

You don't have to deal with any of that ugly 16-bit crud that is used in other operating systems for the PC, like DOS or OS/2; 32-bit segmentation is really a thing of beauty in comparison to that.

i486 addresses are formed from a segment base address plus an offset. To compute an absolute memory address, the i486 figures out which segment register is being used, and uses the value in that segment register as an index into the global descriptor table (GDT). The entry in the GDT tells (among other things) what the absolute address of the start of the segment is. The processor takes this base address and adds on the offset to come up with the final absolute address for an operation. You'll be able to look in a 486 manual for more information about this or about the GDT's organization.

i486 has 6 16-bit segment registers, listed here in order of importance:

CS (Code Segment Register): Added to address during instruction fetch.
SS (Stack Segment Register): Added to address during stack access.
DS (Data Segment Register): Added to address when accessing a memory operand that is not on the stack.
ES, FS, GS (Extra Segment Registers): Can be used as extra segment registers; also used in special instructions that span segments (like string copies).

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References

Memory_Management-Segmentation_1.pdf ↩
Rudes_Factory-Assembly-register.pdf ↩
Parrot_Gw_-_Basic_Disassemble_1.pdf ↩

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