Complex Instruction Set Computer
lastmod 2018-08-17created 2015-12-152 edits
CISC (Complex Instruction Set Computer) is a CPU architecture with a complex instruction set.
Because the instructions are complex, decoding them takes a long time, and the circuitry needed to decode them is also complex. It usually has rich addressing features, so the instructions are highly orthogonal, and any operation can be performed in any addressing mode. For operations, it usually has all of register-register, register-memory, and memory-memory operations. In many cases, two to three operands can be specified. That is, taking the logical AND of the contents of memory 1 and memory 2 and storing it in memory 3 can be done with a single instruction.
The operators of the C language came from instructions that the CISC PDP-11 had. The offset in indexed addressing also often changes to match the data length of the instruction. Also, in operations between data of different lengths, sign extension and the like are performed automatically before the operation, so instructions to align data lengths are often unnecessary. Because the processing for executing a single instruction is complex, the microprogram approach is often adopted.
This approach is mainly used in mainframes, X86-compatible processors, and Motorola's MC 680x0 (68K) family of processors. CISC CPUs such as the Pentium series also internally split complex instructions into simple ones and process them in the instruction pipeline, so their actual internal operation can be said to be the same as RISC.